• Amit Verma - Technical Lead Software Engineer for Timing Solutions, Juniper Networks

Validating a clock recovery system, for example a Precision Time Protocol Slave clock, typically requires the use of a packet generator or impairment device which can simulate real network traffic conditions, or the Hypothetical Reference Model network traffic pattern. This aspect of validation of a clock recovery system or servo is understood well and various products are available to do so. The performance of a clock recovery system also is dependent on the underlying reference oscillator, particularly if the PTP slave is a pure-PTP (without frequency assist). There has been little availability of test equipment that can validate the performance of a PTP clock recovery system against different quality/types of oscillators, or when the oscillators are subjected to varying temperature ramps, or when the oscillators are subjected to mechanical stress. Described here is a method which allows for testing the performance of clock recovery systems while simulating the reference oscillator, with temperature and other impairments applied on the oscillator frequency. This method when applied with the network impairment testing is a better judge of real world performance of the clock recovery system than just network impairment based testing.